GV7704 Datasheet, PDF (21/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

The 270Mb/s data stream uses the same timing and frame structure as Standard
Definition SDI (SD-SDI), and can be monitored using standard SD-SDI test equipment to
check signal integrity. However, the data contained within the active picture area of the
SD-SDI stream contains only encoded HD packets. The HD video content can only be
viewed after the HD-VLC decoding process.
When the GV7704 is HD-VLC encoding HD video formats at “true” 30 or 60 frames per
second, the 270Mb/s serial data input will actually be incoming at a rate of
270 x 1.001Mb/s. This multiplication factor is to account for the fractional increase in the
original HD video frame rate. For all other HD frame rates, the incoming serial data will
be exactly 270Mb/s.
4.4.3 High Definition Output Video Format
ITU-R BT.1120 describes the serial and parallel format for 1080-line interlaced and
progressive digital video. The field/frame blanking period (V), the line blanking period
(H), and the field identification (F), are embedded as digital timing codes (TRS) within
the video. After deserialization, a single 10-bit bus carrying the C'B, Y', C'R, Y', etc. data
pattern is output on the 10-bit parallel data interface, operating at a pixel clock rate of
148.5MHz or 148.5/1.001 MHz.
The following figures show horizontal and vertical timing for 1080-line interlaced
systems.
V=1
V=0
FIELD 1
(F=0) ODD
BLANKING
FIELD 1
ACTIVE VIDEO
LINE
1
20
21
V=1
V=0
FIELD 2
(F=1) EVEN
560
561
BLANKING
563
564
BLANKING
583
584
FIELD 2
ACTIVE VIDEO
V=1
1123
1124
BLANKING
1125
H=1 H=0
EAV SAV
Figure 4-2: Field Timing Relationship for 1080-line Interlaced Systems
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
www.semtech.com
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