GV7704 Datasheet, PDF (2/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

The GV7704 can also be configured to receive HD video
over UTP cable, such as Cat-5e and Cat-6 cable, when
HD-VLC encoded at 270Mb/s.
The device supports the reception of both 8-bit and 10-bit
per pixel YCbCr 4:2:2 BT.1120 component digital video. A
single 10-bit wide parallel digital video output bus per
channel is provided, with associated pixel clock and timing
signal outputs. The GV7704 supports direct interfacing of
HD video formats conforming to ITU-R BT.709 and
BT.1120-6 for 1125-line formats, and SMPTE ST 296 for
750-line formats.
The GV7704 supports the extraction of ancillary data from
the horizontal blanking of the input video data stream.
Ancillary data packets can be accessed via the GSPI,
allowing downstream communication from the video
source to sink device. The GV7704 recognizes data packets
formatted in compliance with the HDcctv 2.0
communications protocol.
The GV7704 features an audio de-embedding core, which
provides the extraction of up to 4 channels of I²S serial
digital audio from the ancillary data space of the input
video data stream. The audio de-embedding core supports
32kHz, 44.1kHz, and 48kHz sample rates.
Packaged in a space saving 169 ball 11 x 11mm BGA, the
GV7704 is ideal for high density, multi-channel video
recorder architectures. Typically requiring only 810mW of
power, the device does not require any special heat sinking
or air flow, reducing the over cost of HD DVR designs.
*Frame structure with encoded HD only. Does not support
SD/D1 video.
Functional Block Diagram
Common
Channel 3
GSPI
Digital Control
JTAG
CH3_SDI
CH3_SDI
EQ
CDR
S2P
Format
Detect
Audio/
Ancilliary
HDVLC
Decoder
Output
Format
Extraction
Channel 2
CH2_SDI
CH2_SDI
EQ
CDR
S2P
Format
Detect
Audio/
Ancilliary
Extraction
HDVLC
Decoder
Output
Format
Channel 1
CH1_SDI
CH1_SDI
EQ
CDR
S2P
Format
Detect
Audio/
Ancilliary
Extraction
HDVLC
Decoder
Output
Format
CH0_SDI
CH0_SDI
Channel 0
EQ
CDR
S2P
Format
Detect
Audio/
Ancilliary
Extraction
HDVLC
Decoder
Output
Format
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
GV7704 Functional Block Diagram
www.semtech.com
CH3_SDO
CH3_SDO
CH3_PCLK
CH3_DOUT[9:0]
CH3_AOUT_1_2
CH3_AOUT_3_4
CH3_ACLK
CH3_WCLK
CH2_SDO
CH2_SDO
CH2_PCLK
CH2_DOUT[9:0]
CH2_AOUT_1_2
CH2_AOUT_3_4
CH2_ACLK
CH2_WCLK
CH1_SDO
CH1_SDO
CH1_PCLK
CH1_DOUT[9:0]
CH1_AOUT_1_2
CH1_AOUT_3_4
CH1_ACLK
CH1_WCLK
CH0_SDO
CH0_SDO
CH0_PCLK
CH0_DOUT[9:0]
CH0_AOUT_1_2
CH0_AOUT_3_4
CH0_ACLK
CH0_WCLK
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