GV7704 Datasheet, PDF (11/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

Table 1-1: GV7704 Pin Descriptions (Continued)
Pin Number
Name
Type
Description
JTAG Interface
B5
TMS
C4
TDI
C5
TDO
A5
TCK
D4
TRST
General I/O and Host Interface
K4
RESET
M5
CS
L4
SDIN
L5
SDOUT
N5
SCLK
D5
EXT_FW
Input
Input
Output
Input
Input
Dedicated JTAG pin – Test Mode Select.
This pin is used to control the operation of the JTAG test.
Schmitt Trigger Input with Pull-Up.
If JTAG is not used this pin may be left floating.
Dedicated JTAG pin – Test data input.
This pin is used to shift JTAG test data into the device.
Schmitt Trigger Input with Pull-Up.
If JTAG is not used this pin may be left floating.
Dedicated JTAG pin – Test data output.
This pin is used to shift results from the device.
Dedicated JTAG pin – Serial data clock signal.
This pin is the JTAG clock.
Schmitt Trigger Input.
If JTAG is not used this pin must be pulled LOW.
Dedicated JTAG pin – Test Reset.
When set LOW, the JTAG logic will be reset.
Schmitt Trigger Input with Pull-Up.
If JTAG is not used this pin must be pulled LOW.
Input
Input
Input
Output
Input
Input
Digital active–low reset input. Used to reset the internal.
operating conditions to default settings.
Schmitt Trigger Input.
Used to initiate and terminate GSPI commands. Active-low.
Serial input data, clocked in on the rising edge of SCLK.
Serial data output. Only used in GSPI mode. Clocked out on the
falling edge of SCLK.
Drive strength may be adjusted using register
GSPI_SDOUT_DRV_STRENGTH_SEL_REG.
Serial clock. The rising edge is used to latch the SDIN bits and the
falling edge to drive SDOUT bits.
External firmware loading control:
When HIGH, indicates to the GV7704 that the host will download
firmware to the GV7704.
When LOW, indicates to the GV7704 to boot with internal
firmware.
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
www.semtech.com
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