GV7704 Datasheet, PDF (19/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

4.3.1 Output Signal Interface Levels
The Serial Data Output signals (SDO and SDO pins), of the device meet the amplitude
requirements as defined in ITU-R BT.656 and BT.1120 for an unbalanced generator
(single-ended).
These requirements are met across all ambient temperature and power supply
operating conditions described in 2. Electrical Characteristics.
4.3.2 Serial Data Output Signal
The device supports two output termination modes (75Ω and 50Ω). The user can
program the SDO_50_EN_REG to make that selection, on a per channel basis. Please
refer to Register Map for details.
4.3.2.1 Serial Data Output Signal Procedure
To enable the serial data output, the user must do a series of GSPI write transactions. The
order is very important and must be followed exactly. The sequence is as shown below:
1. Write 03 to the POWER_UP_DRIVER_REG
2. Write 01 to the P2S_CLK_EN_REG
3. Write 01 to the TX_WORD_CLK_ENABLE_REG
4. Write 01 to the CDR_TX_CLK_EN_REG
5. Write 01 to the P2S_RSTB_REG
6. Write 09 to the DATALANE_FIFO_CTRL_REG
7. Write 08 to the DATALANE_FIFO_CTRL_REG
Please refer to Section 5. Register Map for detailed register information.
Refer to Section 4.9 for GSPI timing requirements.
Note: The serial data output should be disabled to achieve maximum SDI cable reach.
4.4 Video Functionality
4.4.1 Descrambling and Word Alignment
The GV7704 performs NRZI to NRZ decoding and data descrambling according to ITU-R
BT.1120, and word aligns the data to TRS sync words.
The GV7704 carries out descrambling and word alignment to enable the detection of
TRS sync words. When two consecutive valid TRS words (SAV and EAV), with the same
bit alignment have been detected, the device word-aligns the data to the TRS ID words.
Note: Both 8-bit and 10-bit TRS headers are identified by the device.
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
www.semtech.com
19 of 52
Semtech