GV7704 Datasheet, PDF (32/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

The internal address is incremented for each 16-bit read or write access until a
LOW-to-HIGH transition on the CS pin is detected.
When AUTOINC is set to 0, single read or write access is required. Auto-Increment write
must not be used to update values in HOST_CONFIG.
4.9.5.5 UNIT ADDRESS - B11:B5 Command Word
The 7 bits of the UNIT ADDRESS field of the Command Word should always be set to 0.
4.9.5.6 ADDRESS - B4:B0 Command Word, B15:B0 Extended Address
The Address Word consists of bits [4:0] of the Command Word, plus another 16 bits
[15:0] from the Extended Address Word. The total Command and Data Word format,
including the Extended Address, is shown in Figure 4-13 below.
MSB
R/W
0
1
AUTOINC
0
0
A15
A14
A13
A12
A11
A10
Command Word
UNIT ADDRESS
0
0
0
0
ADDRESS[15:0]
A9
A8
A7
A6
ADDRESS[20:16]
LSB
0
A20
A19
A18
A17
A16
A5
A4
A3
A2
A1
A0
Data Word
REPETITION CODE
PAYLOAD (READ/WRITE DATA)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Figure 4-13: Command and Data Word Format
4.9.6 Data Word Description
The Data Word portion of the GSPI access consists of an 8-bit repetition code, followed
by an 8-bit Read or Write access Payload. All registers in the GV7704 are 8 bits long,
however since GSPI write commands are required to be 16 bits long, the Data Word will
have the same byte repeated. For example, to write FC_h to a register within the CSR, the
16-bit Data Word of the GSPI Command should be FCFC_h.
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
www.semtech.com
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Semtech