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K4C561638C-TCD4000 Datasheet, PDF (9/42 Pages) Samsung semiconductor – 256Mb Network-DRAM
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K4C5608/1638C
256Mb Network-DRAM
Notes: 1. All voltages are referenced to Vss, VssQ.
2. VREF is expected to track variations in VddQ DC level of the transmitting device.
Peak to peak AC noise on VREF may not exceed ± 2% of VREF (DC).
3. Overshoot Iimit : VIH(max.) = VddQ + 0.9V with a pulse width <= 5ns
4. Undershoot Iimit : VIL(min.) = -0.9V with a pulse width <= 5ns
5. VIH(DC) and VIL(DC) are levels to maintain the current logic state.
6. VIH(AC) and VIL(AC) are levels to change to the new logic state.
7. VID is magnitude of the difference between CK input level and CK input level.
8. The value of Vx(AC) is expected to equal VddQ/2 of the transmitting device.
9. VISO means [VICK(CK) + VICK(CK)]/2
10. Refer to the figure below.
CLK
CLK
VSS
VID(AC)
VX
VICK
VX
VICK
VX
VX
VX
VICK
VICK
VID(AC)
0 V Differential
VISO
VSS
VISO(min)
VISO(max)
11. In the case of external termination, VTT(Termination Voltage) should be gone in the range of VREF(DC) ± 0.04V.
Pin Capacitance (Vdd, VddQ = 2.5V, f = 1MHz, Ta = 25×°C)
Symbol
Parameter
Min
CIN
Input Pin Capacitance
2.5
CINC
Clock Pin (CK, CK) Capacitance
2.5
CI/O
I/O Pin (DQ, DQS) Capacitance
3.0
CNC1
NC1 Pin Capacitance
-
CNC2
NC2 Pin Capacitance
4.0
Note : These parameters are periodically sampled and not 100% tested.
2 The NC2 pins have additional capacitance for adjustment of the adjacent pin capacitance.
1 The NC2 pins have Power and Ground clamp.
Max
Units
4.0
pF
4.0
pF
6.0
pF
1.5
pF
6.0
pF
-9-
REV. 0.7 Aug. 2003
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