K4C561638C-TCD4000 Datasheet, PDF (26/42 Pages) Samsung semiconductor – 256Mb Network-DRAM

K4C5608/1638C
256Mb Network-DRAM
Single Bank Write Timing (CL = 3)
0
1
2
3
4
CK
CK
I_RC = 5 cycles
Command
WRA LAL
DESL
BL = 2
DQS
(Input)
I_RCD = 1 cycle
I_RAS = 4 cycles
DQ
(input)
BL = 4
DQS
(Input)
WL = 2
D0 D1
t_DQSS
WL = 2
5
6
7
8
9
WRA LAL
I_RCD = 1 cycle
I_RC = 5 cycles
DESL
I_RAS = 4 cycles
t_DQSS
WL = 2
D0 D1
t_DQSS
WL = 2
10
11
WRA LAL
I_RCD = 1 cycle
DQ
(input)
D0 D1 D2 D3
D0 D1 D2 D3
Single Bank Write Timing (CL = 4)
0
1
2
3
4
5
6
7
8
9
10
11
CK
CK
I_RC = 5 cycles
I_RC = 5 cycles
Command
WRA LAL
DESL
WRA LAL
DESL
WRA LAL
BL = 2
DQS
(Input)
I_RCD = 1 cycle
I_RAS = 4 cycles
WL = 3
I_RCD = 1 cycle
I_RAS = 4 cycles
WL = 3
I_RCD = 1 cycle
DQ
(input)
BL = 4
DQS
(Input)
D0 D1
t_DQSS
WL = 3
D0 D1
t_DQSS
WL = 3
DQ
(input)
D0 D1 D2 D3
D0 D1 D2 D3
Note :
means "H" or "L"
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REV. 0.7 Aug. 2003