K4S161622D Datasheet, PDF (32/41 Pages) Samsung semiconductor – 512K x 16Bit x 2 Banks Synchronous DRAM

K4S161622D
Read & Write Cycle with Auto Precharge I @Burst Length=4
CMOS SDRAM
CLOCK
CKE
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
HIGH
CS
RAS
CAS
ADDR
Ra
BA
Rb Ca
Cb
Ra
Ca
A10/AP
Ra
Rb
Ra
DQ CL=2
Qa0 Qa1 Qb0 Qb1 Qb2 Qb3
Da0 Da1
CL=3
Qa0 Qa1 Qb0 Qb1 Qb2 Qb3
Da0 Da1
WE
DQM
Row Active
(A-Bank)
Read with
Auto Pre
charge
(A-Bank)
Row Active
(B-Bank)
Read without Auto
precharge(B-Bank)
Auto Precharge
Start Point
(A-Bank)*
Precharge
(B-Bank)
Row Active
(A-Bank)
Write with
Auto Precharge
(A-Bank)
: Don't care
*Note:
* When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
- if Read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank
auto precharge will start at B Bank read command input point .
- any command can not be issued at A Bank during tRP after A Bank auto precharge starts.