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K4S161622D Datasheet, PDF (16/41 Pages) Samsung semiconductor – 512K x 16Bit x 2 Banks Synchronous DRAM
K4S161622D
CMOS SDRAM
5. Write Interrupted by Precharge & DQM
CLK
CMD
DQM
DQ
WR
Note 3
PRE
Note 2
D0 D1 D2 D3
Masked by DQM
*Note : 2. To inhibit invalid write, DQM should be issued.
3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge
interrupt but only the other bank precharge of dual banks operation.