K4S161622D Datasheet, PDF(15/41 Page) Samsung semiconductor – 512K x 16Bit x 2 Banks Synchronous DRAM

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K4S161622D Datasheet, PDF (15/41 Pages) Samsung semiconductor – 512K x 16Bit x 2 Banks Synchronous DRAM

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K4S161622D

4. CAS Interrupt (II) : Read Interrupted by Write & DQM

(a) CL=2, BL=4

CLK

i) CMD

DQM

ii) CMD

RD WR

D0 D1 D2 D3

DQM

iii) CMD

Hi-Z D0

DQM

iv) CMD

Hi-Z D0

DQM

(b) CL=3, BL=4

CLK

i) CMD

DQM

ii) CMD

Hi-Z

D0 D1 D2 D3

Note 1

RD WR

D0 D1 D2 D3

DQM

iii) CMD

D0 D1 D2 D3

DQM

iii) CMD

D0 D1 D2 D3

DQM

iv) CMD

Hi-Z D0

D1 D2

DQM

Hi-Z

D1 D2

Note 1

*Note : 1. To prevent bus contention, there should be at least one gap between data in and data out.

CMOS SDRAM

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