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K4S161622D Datasheet, PDF (30/41 Pages) Samsung semiconductor – 512K x 16Bit x 2 Banks Synchronous DRAM
K4S161622D
Page Write Cycle at Different Bank @Burst Length=4
CMOS SDRAM
CLOCK
CKE
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
HIGH
CS
RAS
CAS
*Note 2
ADDR
RAa
CAa RBb
CBb
BA
CAc
CBd
A10/AP
RAa
DQ
WE
DQM
RBb
DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3 DAc0 DAc1 DBd0 DBd1
tCDL
tRDL
*Note 1
Row Active
(A-Bank)
Row Active
(B-Bank)
Write
(A-Bank)
Write
(B-Bank)
Write
(A-Bank)
Write
(B-Bank)
Precharge
(Both Banks)
*Note : 1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and the precharge banks must be the same.
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