R01DS0190EJ0100 Datasheet, PDF (99/110 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS, up to 128 Kbytes of flash memory

RX111 Group
5. Electrical Characteristics
5.11 E2 DataFlash Characteristics
Table 5.49 E2 DataFlash Characteristics (1)
Item
Reprogramming/erasure cycle*¹
Data hold time
After 10000 times of N_DPEC
After 100000 times of N_DPEC
After 1000000 times of N_DPEC
Symbol
N_DPEC
t_DDRP
Min.
100000
20*^2, *³
5*^2, *³
—
Typ.
1000000
—
—
1*^2, *³
Max.
—
—
—
—
Unit
Times
Year
Year
Year
Conditions
Ta = +85°C
Ta = +25°C
Note 1. The reprogram/erase cycle is the number of erasing for each block. When the reprogram/erase cycle is n times (n = 100000),
erasing can be performed n times for each block. For instance, when 1-byte programming is performed 1000 times for different
addresses in 1-byte block and then the entire block is erased, the reprogram/erase cycle is counted as one. However,
programming the same address for several times as one erasing is not enabled (overwriting is prohibited).
Note 2. Characteristics when using the flash memory programmer and the self-programming library provided from Renesas Electronics.
Note 3. These results are obtained from reliability testing.
Table 5.50 E2 DataFlash Characteristics (2)
: high-speed operating mode, middle-speed operating mode
Conditions: VCC = AVCC0 = 2.7 to 3.6 V, VSS = AVSS0 = VREFL0 = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +105°C
Item
Programming time
1-byte
Erasure time
1-Kbyte
Blank check time
1-byte
1-Kbyte
Suspended time during erasing
DataFlash STOP recovery time
Symbol
t_DP1
t_DE1K
t_DBC1
t_DBC1K
t_DSED
t_DSTOP
FCLK = 4 MHz
Min.
Typ.
—
1450
—
18.8
—
—
—
—
—
—
5
—
Max.
1740
547
1130
7590
21.5
—
FCLK = 32 MHz
Unit
Min.
Typ. Max.
—
83.2
484
μs
—
8.19
274
ms
—
—
70.5
μs
—
—
580
ms
—
—
12.8
μs
5
—
—
μs
Note: • Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note: • The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note: • The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
Table 5.51 E2 DataFlash Characteristics (3)
: middle-speed operating mode
Conditions: VCC = AVCC0 = 1.8 to 3.6 V, VSS = AVSS0 = VREFL0 = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +105°C
Item
Programming time
1-byte
Erasure time
1-Kbyte
Blank check time
1-byte
1-Kbyte
Suspended time during erasing
DataFlash STOP recovery time
Symbol
t_DP1
t_DE1K
t_DBC1
t_DBC1K
t_DSED
t_DSTOP
FCLK = 4 MHz
Min.
Typ.
—
1490
—
18.9
—
—
—
—
—
—
720
—
Max.
2220
498
1170
7.39
33.5
—
FCLK = 32 MHz
Unit
Min.
Typ. Max.
—
255
1130
μs
—
7.93
280
ms
—
—
212
μs
—
—
1.97 ms
—
—
25.5
μs
720
—
—
ns
Note: • Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note: • The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note: • The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
R01DS0190EJ0100 Rev.1.00
Jun 19, 2013
Page 99 of 107