R01DS0190EJ0100 Datasheet, PDF (80/110 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS, up to 128 Kbytes of flash memory

RX111 Group
5. Electrical Characteristics
Table 5.34 Timing of On-Chip Peripheral Modules (5)
Conditions: VCC = AVCC0 = VCC_USB = 2.7 to 3.6 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V, fPCLKB ≤ 32 MHz,
T_a = –40 to +105°C
Item
Symbol
Min.*¹
Max.
Unit Test Conditions
Simple IIC
(Standard mode)
SDA0 rise time
SDA0 fall time
t_Sr
—
t_Sf
—
SDA0 spike pulse removal time
t_SP
0
Data setup time
t_SDAS
250
Data hold time
t_SDAH
0
SCL0, SDA0 capacitive load
C_b
—
Simple IIC
(Fast mode)
SCL0, SDA0 rise time
SCL0, SDA0 fall time
t_Sr
—
t_Sf
—
SCL0, SDA0 spike pulse removal time
t_SP
0
Data setup time
t_SDAS
100
Data hold time
t_SDAH
0
SCL0, SDA0 capacitive load
C_b
—
1000
300
4 × t_pcyc*²
—
—
400
300
300
4 × t_pcyc*²
—
—
400
ns Figure 5.46
ns
ns
ns
ns
pF
ns Figure 5.46
ns
ns
ns
ns
pF
Note: • t_Pcyc: PCLK cycle
Note 1. C_b indicates the total capacity of the bus line.
Note 2. This applies when the SMR.CKS[1:0] bits = 00b and the SNFR.NFCS[2:0] bits = 010b while the SNFR.NFE bit = 1 and the digital
filter is enabled.
PCLK
Port
t_PRW
Figure 5.33 I/O Port Input Timing
PCLK
Output
compare output
Input capture
input
t_TICW
Figure 5.34 MTU2 Input/Output Timing
R01DS0190EJ0100 Rev.1.00
Jun 19, 2013
Page 80 of 107