R-IN32M3 Datasheet, PDF (99/116 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
4. Electrical Specifications
4.8.5
Serial Flash ROM Interface
Parameter
SMSCK output cycle
SMSCK high level width
SMSCK low level width
SMSCK rise time
SMSCK fall time
Delay time from a falling of SMCSZ to a
rising of SMSCK
Hold time until a rising of SMCSZ from a
rising of SMSCK
SMCSZ high level width
SMSI input setup time (to SMSCK↓)
SMSI input hold time (from SMSCK↓)
SMSI output delay time (from SMSCK↓)
SMSO input setup time (to SMSCK↓)
SMSO input hold time (from SMSCK↓)
SMSO output delay time (from SMSCK↓)
Symbol
tSFRCYC
tSMCKH
tSMCKL
tSMCKR
tSFRCYC
tDSMCSCK
tDSMCKCS
tSMCSH
tSSMI
tHSMI
tDSMI
tSSMO
tHSMO
tDSMO
Conditions
CL = 15 pF
CL = 15 pF
Freq = 50 MHz
CL = 15 pF
Freq = 50 MHz
CL = 15 pF
-
-
CL = 15 pF
-
-
CL = 15 pF
MIN
20
0.5 tSFRCYC - 2.0
0.5 tSFRCYC - 2.0
－
－
7.5 ^Note
11.5 ^Note
14 ^Note
6.0
0
-1.0
6.0
0
-1.0
MAX
-
0.5 tSFRCYC + 2.0
0.5 tSFRCYC + 2.0
1.9
1.9
－
－
－
-
-
5.0
-
-
5.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Ns
ns
ns
ns
ns
ns
Note: Timing can be extended by setting of SFMSSC register.
Please refer to 12.2.2 Chip Selection Control Register (SFMSSC) of User’s Manual (Peripheral
Modules)
SMSCK（Output）
[SPI MODE 3]
SMSCK（Output）
[SPI MODE 0]
SMCSZ
（Output）
SMSO/SMSI
（Output）
SMSI/SMSO
（input）
< t_SFRCYC > < t_SMCKR >
< t_SMCKH >
< t_SMCKF >
< t_SMCKL >
< t_DSMCSCK >
< t_DSMI >
< t_DSMO >
MSB
< t_SSMO >
< t_SSMI>
MSB
< t_DSMCKCS > < t_SMCSH >
LSB
< t_HSMO >
< t_HSMI >
LSB
Figure 4.18 Serial Flash Rom Access Timing Diagram
R18DS0008EJ0401
Feb 28, 2017
Page 99 of 110