R-IN32M3 Datasheet, PDF (100/116 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
4. Electrical Specifications
4.8.6
External DMA Interface
Parameter
DMAREQZn, RTDMAREQZ
input setup time (from BUSCLK↑)
DMAREQZn, RTDMAREQZ
input hold time 1
DMAREQZn, REDMAREQZ
input hold time 2 (from BUSCLK↑)
DMAACKZn, RTDMACKZ
output delay time (from BUSCLK↑)
DMAACKZn, RTDMAACKZ
output low level width
DMATCZn, RTDMATCZ
output delay time (from BUSCLK↑)
Symbol Conditions
MIN
tSKDR
-
7.0
MAX
Unit
-
ns
tHKDR1
tHKDR2
tDKDA
tWDAL
-
Until DMAACKZn↓,
RTDMAACKZ↓
-
-
CL = 30pF
2.0
-
ns
tBUSCLK ^Note1 × m ^Note2 -
ns
7.0
10.0
ns
-
tBUSCLK ^Note1 × m ^Note2 - 8 tBUSCLK ^Note1 × m ^Note2 + 8
ns
tDKTC
CL = 30pF
2.0
10.0
ns
Notes 1. t_BUSCLK is one cycle (10 ns) of BUSCLK.
2. n = 0,1 and m = 1-31 (DMAIFC0, DMAIFC1, RTMDAIFC registers).
BUSCLK (output)
DMAREQZn,
RTDMAREQZ
(input)
< t_SKDR >
< t_HKDR1 >
DMAACKZn,
RTDMAACKZ
(output)
< t_DKDA >
DMATCZn,
RTDMATCZ
(output)
Figure 4.19 External DMA Access Timing Diagram
< t_HKDR2 >
< t_WDAL >
< t_DKTC >
Remark: n = 0, 1
R18DS0008EJ0401
Feb 28, 2017
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