HD64F3694FXV Datasheet, PDF (97/452 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 4 Address Break
Figures 4.2 show the operation examples of the address break interrupt setting.
When the address break is specified in instruction execution cycle
Register setting
• ABRKCR = H'80
• BAR = H'025A
Program
0258 NOP
* 025A NOP
025C MOV.W @H'025A,R0
0260 NOP
0262 NOP
:
:
Underline indicates the address
to be stacked.
φ
Address
bus
Interrupt
request
NOP NOP MOV MOV
instruc- instruc- instruc- instruc-
tion
tion tion 1 tion 2 Internal
prefetch prefetch prefetch prefetch processing
Stack save
0258 025A 025C 025E
Interrupt acceptance
SP-2 SP-4
Figure 4.2 Address Break Interrupt Operation Example (1)
When the address break is specified in the data read cycle
Register setting
• ABRKCR = H'A0
• BAR = H'025A
Program
0258 NOP
025A NOP
* 025C MOV.W @H'025A,R0
0260 NOP
Underline indicates the address
0262 NOP
to be stacked.
:
:
MOV MOV NOP MOV NOP Next
instruc- instruc- instruc- instruc- instruc- instru-
tion 1 tion 2 tion
tion
tion
ction Internal Stack
prefetch prefetch prefetch execution prefetch prefetch processing save
φ
Address
bus
Interrupt
request
025C 025E 0260 025A 0262
0264
Interrupt acceptance
SP-2
Figure 4.2 Address Break Interrupt Operation Example (2)
Rev.5.00 Nov. 02, 2005 Page 67 of 418
REJ09B0028-0500