HD64F3694FXV Datasheet, PDF (117/452 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 ROM
Section 7 ROM
The features of the 32-kbyte flash memory built into the flash memory version are summarized
below.
• Programming/erase methods
 The flash memory is programmed 128 bytes at a time. Erase is performed in single-block
units. The flash memory is configured as follows: 1 kbyte × 4 blocks and 28 kbytes × 1
block. To erase the entire flash memory, each block must be erased in turn.
• Reprogramming capability
 The flash memory can be reprogrammed up to 1,000 times.
• On-board programming
 On-board programming/erasing can be done in boot mode, in which the boot program built
into the chip is started to erase or program of the entire flash memory. In normal user
program mode, individual blocks can be erased or programmed.
• Programmer mode
 Flash memory can be programmed/erased in programmer mode using a PROM
programmer, as well as in on-board programming mode.
• Automatic bit rate adjustment
 For data transfer in boot mode, this LSI's bit rate can be automatically adjusted to match
the transfer bit rate of the host.
• Programming/erasing protection
 Sets software protection against flash memory programming/erasing.
• Power-down mode
 Operation of the power supply circuit can be partly halted in subactive mode. As a result,
flash memory can be read with low power consumption.
7.1 Block Configuration
Figure 7.1 shows the block configuration of 32-kbyte flash memory. The thick lines indicate
erasing units, the narrow lines indicate programming units, and the values are addresses. The flash
memory is divided into 1 kbyte × 4 blocks and 28 kbytes × 1 block. Erasing is performed in these
units. Programming is performed in 128-byte units starting from an address with lower eight bits
H'00 or H'80.
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Rev.5.00 Nov. 02, 2005 Page 87 of 418
REJ09B0028-0500