32192 Datasheet, PDF (969/1044 Pages) Renesas Technology Corp – MCU

23
ELECTRICAL CHARACTERISTICS
23.10 A.C. Characteristics (when VCCE = 3.3 V)
Input pin
(Relative to VCCE)
Input pin
(Relative to VCC-BUS)
[115] tr(INPUT)
0.8VCCE
0.2VCCE
[115] tr(INPUT)
[116] tf(INPUT)
0.8VCCE
0.2VCCE
[116] tf(INPUT)
0.43VCC-BUS 0.43VCC-BUS
0.16VCC-BUS
0.16VCC-BUS
Figure 23.10.2 Input/Output Transition Time
(3) Clock and Reset Timing
Symbol
Parameter
tc(XIN)
tw(XINH)
tw(XINL)
tr(XINH)
tr(XINL)
tw(RESET)
Clock Input Cycle Time
External Clock Input "H" Pulse Width
External Clock Input "L" Pulse Width
External Clock Input Hign-going Time
External Clock Input Low-going Time
Reset Input "L" Pulse Width
Rated Value
MIN
MAX
50
66.7
20
20
5
5
300
Unit See Fig
23.10.3
ns [119]
ns [120]
ns [121]
ns [122]
ns [123]
ns [124]
XIN (Input)
(When using
oscillation circuit)
[119] tc(XIN)
0.5VCC-BUS
0.5VCC-BUS
XIN (Input)
(When using
external clock input)
(Note 1)
[120] tw(XINH) [121] tw(XINL)
[122] tr(XINH) [123] tr(XINL)
0.8VCC-BUS
0.2VCC-BUS
0.2VCC-BUS
0.8VCC-BUS
0.2VCC-BUS
[124] tw(RESET)
RESET# (Input)
0.2VCCE
0.2VCCE
Note 1: Make XOUT pin open and set parasitic capacity as 10pF or less.
The XDRV bit of clock control register (CLKCR) should be choosen B'11 (maximum).
Figure 23.10.3 Clock and Reset Timing
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
23-43