32192 Datasheet, PDF (433/1044 Pages) Renesas Technology Corp – MCU

10
MULTIJUNCTION TIMERS
10.6 TML (Input-Related 32-Bit Timer)
10.6 TML (Input-Related 32-Bit Timer)
10.6.1 Outline of TML
TML (Timer Measure Large) is an input-related 32-bit timer capable of measuring input pulses in two circuit
blocks comprising a total of eight channels.
The table and diagram below show specifications and a block diagram of TML, respectively.
Table 10.6.1 Specifications of TML (Input-Related 32-Bit Timer)
Item
Specification
Number of channels
8 channels (2 circuit blocks consisting of 4 channels each, 8 channels in total)
Input clock
BCLK/4 (10.0 MHz when f(BCLK) = 40 MHz), BCLK/2 (20.0 MHz when f(BCLK) = 40 MHz)
or clock bus 1 input
Counter
32-bit up-counter × 2
Measure register
32-bit measure register × 8
Timer startup
Start counting after exiting the reset state
BCLK
TIN20 (P134)
TIN21 (P135)
TIN22 (P136)
TIN23 (P137)
TIN30 (P34)
TIN31 (P35)
TIN32 (P36)
TIN33 (P37)
Clock bus Input event bus
3210 3210
Output event bus
0123
TML0
1/2
clk
1/4
S
Counter
Measure register 3
(32-bit)
Measure register 2
Measure register 1
Measure register 0
IRQ11
TIN20S _DMA5
IRQ11
TIN21S
IRQ11
TIN22S
IRQ11
TIN23S
AD0TRG
cap3 cap2 cap1 cap0
S
S
S
S
TML1
S
clk _Counter
(32-bit)
Measure register 3
Measure register 2
Measure register 1
Measure register 0
IRQ18
TIN30S
DMA common
TIN31S ^IRQ18
IRQ18
TIN32S
IRQ18
TIN33S
cap3 cap2 cap1 cap0
S
S
S
S
3210 3210
S : Selector
0123
Figure 10.6.1 Block Diagram of TML (Input-Related 32-Bit Timer)
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
10-129