32192 Datasheet, PDF (71/1044 Pages) Renesas Technology Corp – MCU

3
ADDRESS SPACE
3.4 Internal RAM and SFR Areas
SFR Area Register Map (4/37)
Address
b0
H'0080 01E2
H'0080 01E4
|
H'0080 0200
H'0080 0202
H'0080 0204
|
H'0080 0210
H'0080 0212
H'0080 0214
H'0080 0216
H'0080 0218
H'0080 021A
|
H'0080 0220
H'0080 0222
H'0080 0224
H'0080 0226
H'0080 0228
H'0080 022A
|
H'0080 0230
H'0080 0232
H'0080 0234
H'0080 0236
H'0080 0238
H'0080 023A
H'0080 023C
H'0080 023E
H'0080 0240
H'0080 0242
H'0080 0244
H'0080 0246
|
+0 address
Flash Control Register 1
(FCNT1)
Flash Control Register 3
(FCNT3)
b7 b8
(Use inhibited area)
+1 address
Flash Control Register 2
(FCNT2)
Flash Control Register 4
(FCNT4)
See pages
b15
6-17
6-18
6-19
6-22
Common Count Clock Select Register
(CNTCKSEL)
Clock Bus & Input Event Bus Control Register
(CKIEBCR)
Prescaler Register 0
(PRS0)
Prescaler Register 1
(PRS1)
Prescaler Register 2
(PRS2)
Output Event Bus Control Register
(OEBCR)
(Use inhibited area)
10-12
10-17
10-13
10-13
10-18
TCLK Input Processing Control Register
(TCLKCR)
TIN Input Processing Control Register 0
(TINCR0)
TIN Input Processing Control Register 1
(TINCR1)
TIN Input Processing Control Register 2
(TINCR2)
TIN Input Processing Control Register 3
(TINCR3)
TIN Input Processing Control Register 4
(TINCR4)
(Use inhibited area)
10-21
10-22
10-23
10-24
10-25
10-25
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
F/F Source Select Register 0
(FFS0)
F/F Source Select Register 1
(FFS1)
F/F Protect Register 0
(FFP0)
F/F Data Register 0
(FFD0)
F/F Protect Register 1
(FFP1)
F/F Data Register 1
(FFD1)
(Use inhibited area)
10-28
10-29
10-30
10-32
10-30
10-32
TOP Interrupt Control Register 0
(TOPIR0)
TOP Interrupt Control Register 1
(TOPIR1)
TOP Interrupt Control Register 2
(TOPIR2)
TOP Interrupt Control Register 3
(TOPIR3)
TIO Interrupt Control Register 0
(TIOIR0)
TIO Interrupt Control Register 1
(TIOIR1)
TIO Interrupt Control Register 2
(TIOIR2)
TMS Interrupt Control Register
(TMSIR)
TIN Interrupt Control Register 0
(TINIR0)
TIN Interrupt Control Register 1
(TINIR1)
TIN Interrupt Control Register 2
(TINIR2)
TIN Interrupt Control Register 3
(TINIR3)
TIN Interrupt Control Register 4
(TINIR4)
TIN Interrupt Control Register 5
(TINIR5)
TIN Interrupt Control Register 6
(TINIR6)
TIN Interrupt Control Register 7
(TINIR7)
TOP0 Counter
(TOP0CT)
TOP0 Reload Register
(TOP0RL)
(Use inhibited area)
10-38
10-40
10-41
10-42
10-43
10-44
10-45
10-46
10-47
10-48
10-50
10-52
10-55
10-71
10-72
TOP0 Correction Register
(TOP0CC)
(Use inhibited area)
10-73
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
3-13