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32192 Datasheet, PDF (476/1044 Pages) Renesas Technology Corp – MCU
10
MULTIJUNCTION TIMERS
10.8 TOU (Output-Related 24-Bit Timer)
The output disable level select function allows output from a port to be forcibly disabled (placed in the high-
impedance state) depending on the output state of that port.
This function may be used to determine whether three-phase PWM output signals are simultaneously on.
Furthermore, this function may be used for double-verification of ports because it works depending on the
output state of ports. This function can be used for all of output modes or port outputs of TOU. However, use for
other modes (external bus, SIO mode, DRI mode and TOP output modes (TO0-TO5) port inputs) is prohibited.
For details, see Section 10.8.20, “PWM Output Disable Function.”
(1) POnLVSEL (Output Disable Level Select) bit (Bit 14)
This bit specifies the level ("H" or "L") at which port output is to be disabled. Set this bit to "0" to disable port
output when its level is "L", or "1" to disable port output when its level is "H".
The following shows the conditions under which port output is turned off depending on the port’s output
state.
1) PO0LVSEL = 0
If any one of the following conditions hold true, TO21–TO26 outputs (TOU0_0–TOU0_5 output pins)
are disabled.
• TO21 (TOU0_0 output pin) output and TO22 (TOU0_1 output pin) output both are at the "L" level
• TO23 (TOU0_2 output pin) output and TO24 (TOU0_3 output pin) output both are at the "L" level
• TO25 (TOU0_4 output pin) output and TO26 (TOU0_5 output pin) output both are at the "L" level
2) PO0LVSEL = 1
If any one of the following conditions hold true, TO21–TO26 outputs (TOU0_0–TOU0_5 output pins)
are disabled.
• TO21 (TOU0_0 output pin) output and TO22 (TOU0_1 output pin) output both are at the "H" level
• TO23 (TOU0_2 output pin) output and TO24 (TOU0_3 output pin) output both are at the "H" level
• TO25 (TOU0_4 output pin) output and TO26 (TOU0_5 output pin) output both are at the "H" level
3) PO1LVSEL = 0
If any one of the following conditions hold true, TO29–P185/TO34 outputs (TOU1_0–TOU1_5 output
pins) are disabled.
• TO29 (TOU1_0 output pin) output and TO30 (TOU1_1 output pin) output both are at the "L" level
• TO31 (TOU1_2 output pin) output and TO32 (TOU1_3 output pin) output both are at the "L" level
• TO33 (TOU1_4 output pin) output and TO34 (TOU1_5 output pin) output both are at the "L" level
4) PO1LVSEL = 1
If any one of the following conditions hold true, TO29–TO34 outputs (TOU1_0–TOU1_5 output pins)
are disabled.
• TO29 (TOU1_0 output pin) output and TO30 (TOU1_1 output pin) output both are at the "H" level
• TO31 (TOU1_2 output pin) output and TO32 (TOU1_3 output pin) output both are at the "H" level
• TO33 (TOU1_4 output pin) output and TO34 (TOU1_5 output pin) output both are at the "H" level
(2) POnLVEN (Output Disable Level Enable/Disable Select) bit (Bit 15)
This bit enables or disables the output disable level that was selected with the POnLVSEL bit. Setting this bit
to "1" enables the output disable level selected with the POnLVSEL bit; setting this bit to "0" disables the
output disable level selected with the POnLVSEL bit.
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
10-172