32192 Datasheet, PDF (417/1044 Pages) Renesas Technology Corp – MCU

10
MULTIJUNCTION TIMERS
10.4 TIO (Input/Output-Related 16-Bit Timer)
10.4.11 Operation in TIO PWM Output Mode
(1) Outline of TIO PWM output mode
In PWM output mode, the timer uses two reload registers to generate a waveform with a given duty cycle.
When the timer is enabled "by writing to the enable bit in software or by external input" after setting the initial
values in the reload 0 and reload 1 registers, the counter is loaded with the value that "the reload 0 register
-1" and starts counting down synchronously with the count clock at the next cycle. At the cycle after the first
time the counter underflows, it is loaded with the value that "the reload 1 register -1" and continues counting.
Thereafter, the counter is loaded with the reload 0 and reload 1 register values alternately each time an
underflow occurs. The "reload 0 register set value + 1" and "reload 1 register set value + 1" respectively are
effective as count values. The timer stops at the same time count is disabled by writing to the enable bit "and
not in synchronism with PWM output period."
The F/F output waveform in PWM output mode is inverted "F/F output level changes from "L" to "H" or vice versa"
when the counter starts counting and each time it underflows.
Furthermore, it is possible to generate an interrupt request at even-numbered occurrences of underflow after the
counter is enabled and a DMA transfer request "for only the TIO8 and TIO9" every time the counter underflows.
Note that TIO’s PWM output mode does not have the count correction function.
Enabled
(by writing to the enable bit
or by external input)
Underflow
(first time)
Underflow
(second time)
Count clock
Enable bit
H'FFFF
Counter
Undefined
value
H'A000
Count down from
the reload 0
register set value
H'C000
(Note 2)
Count down from
the reload 1
register set value
Count down from
the reload 0
register set value
(Note 3)
HH''AA000000
(Note 2)
H'0000
Reload 0 register
HH''AA000000
Reload 1 register
HH''CC000000
Reload 1 buffer
(Note 4)
(Note 4)
F/F output (Note 5)
TIO interrupt request
Data inverted by
enable
Data inverted by
underflow
Data inverted by
underflow
PWM output period
TIO interrupt request due to
even-numbered occurrences of underflow
DMA transfer request (Note 1)
DMA transfer request
due to underflow
DMA transfer request
due to underflow
Note 1: Only TIO8 and TIO9 can be generated.
Note 2: The value that "reload 0 register - 1" is reloaded.
Note 3: The value that "reload 1 buffer - 1" is reloaded.
Note 4: When reload0 is reloaded after updating reload0 register, reload 1 buffer is tranferd.
Note 5: Updating of reload 0 and reload 1 during timer operation does not effect PWM waveform
that is outputting at present.
Updating is reflected at the next PWM period after updating reload 0 register.
Note: • This diagram does not show detailed timing information.
Figure 10.4.9 Typical Operation in PWM Output Mode
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
10-113