32192 Datasheet, PDF (283/1044 Pages) Renesas Technology Corp – MCU

9
DMAC
9.2 DMAC Related Registers
9.2.2 DMA Software Request Generation Registers
DMA0 Software Request Generation Register (DM0SRI)
DMA1 Software Request Generation Register (DM1SRI)
DMA2 Software Request Generation Register (DM2SRI)
DMA3 Software Request Generation Register (DM3SRI)
DMA4 Software Request Generation Register (DM4SRI)
DMA5 Software Request Generation Register (DM5SRI)
DMA6 Software Request Generation Register (DM6SRI)
DMA7 Software Request Generation Register (DM7SRI)
DMA8 Software Request Generation Register (DM8SRI)
DMA9 Software Request Generation Register (DM9SRI)
<Address: H’0080 0460>
<Address: H’0080 0462>
<Address: H’0080 0464>
<Address: H’0080 0466>
<Address: H’0080 0468>
<Address: H’0080 0470>
<Address: H’0080 0472>
<Address: H’0080 0474>
<Address: H’0080 0476>
<Address: H’0080 0478>
b0
1
2
3
4
5
6
7
8
9
10
11 12 13 14 b15
DM0SRI–DM9SRI
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
<Upon exiting reset: Undefined>
b
Bit Name
Function
RW
0–15
DM0SRI–DM9SRI
DMA transfer request is generated by writing any
DMA software request generation bits
data to these bits.
Note: • This register may be accessed in either bytes or halfwords.
?W
The DMA Software Request Generation Register is used to generate DMA transfer requests in software. A
DMA transfer request can be generated by writing any data to this register when “Software start” has been
selected for the cause of DMA transfer request.
(1) DM0SRI–DM9SRI (DMA Software Request Generation) bits
A software DMA transfer request is generated by writing any data to this register in halfword (16 bits) or in
byte (8 bits) beginning with an even or odd address when “Software start” is selected as the cause of DMA
transfer request (by setting the DMAn Channel Control Register 0 bits 2–3 to "00").
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
9-29