M16C6KA_15 Datasheet, PDF (95/270 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6KA Group
Clock synchronous serial I/O mode
(1) Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Tables.GA-2 and
GA-3 list the specifications of the clock synchronous serial I/O mode. Fig.GA-8 shows the UART1 transmit/
receive mode register.
Table.GA-2 Specifications of clock synchronous serial I/O mode (1)
Item
Specification
Transfer data format
• Transfer data length: 8 bits
Transfer clock
Transmission/reception control
Transmission start condition
• When internal clock is selected (bit 3 at address 03A816 = “0” ) :
fi/ 2(n+1) (Note 1) fi = f1, f8, f32
• When external clock is selected (bit 3 at address 03A816 = “1” ) :
Input from CLK1 pin
_______
_______
_______ _______
• Selecting from CTS function/RTS function/Disable CTS, RTS function
• To start transmission, the following requirements must be met:
_ _{Transmit enable bit (bit 0 at address 03AD16) = “1”}
_ _{Transmit buffer empty flag (bit 1 at address 03AD16) = “0”}
_______
_______
_ _{When CTS function selected, CTS input level = “L”}
Reception start condition
• Furthermore, if external clock is selected, the following requirements must also be met:
_ _{CLK1 polarity select bit (bit 6 at address 03AC16) = “0”:}
CLK1 input level = “H”
_ _{CLK1 polarity select bit (bit 6 at address 03AC16) = “1”:}
CLK1 input level = “L”
• To start reception, the following requirements must be met:
_ _{Receive enable bit (bit 2 at address 03AD16) = “1”}
_ _{Transmit enable bit (bit 0 at address 03AD16) = “1”}
_ _{Transmit buffer empty flag (bit 1 at address 03AD16) = “0”}
• Furthermore, if external clock is selected, the following requirements must
Interrupt request
generation timing
also be met:
_ _{CLK1 polarity select bit (bit 6 at address 03AC16) = “0”:}
CLK1 input level = “H”
_ _{CLK1 polarity select bit (bit 6 at address 03AC16) = “1”:}
CLK1 input level = “L”
• When transmitting
_ _{Transmit interrupt factor selection bit (bit 1 at address 03B016) = “0”:}
At the completion of data transmission from UART1 transfer buffer register
to UART1 transmit register
_ _{Transmit interrupt factor selection bit (bit 1 at address 03B016) = “1”:}
At the completion of data transmission from UART1 transfer register is
completed
• When receiving
_ _{At the completion of data transferring from UART1 receive register to}
UART1 receive buffer register
Error detection
• Overrun error (Note 2)
This error occurs when bit 7 of next data is received before the contents of
UART1 receive buffer register are read out.
Note 1: “n” denotes the value 0016 to FF16 that is set to the UART bit rate generator.
Note 2: If an overrun error occurs, the UART1 receive buffer will have the next data written in. Note also that
the UART1 receive interrupt request bit is not set to “1”.
Rev.1.00 Jul 16, 2004 page 93 of 266
REJ03B0100-0100Z