M16C6KA_15 Datasheet, PDF (56/270 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6KA Group
Interrupt
_______ ________
Reset > NMI > DBC > Watchdog timer > Peripheral I/O > Single step > Address match
Fig.DD-9 Hardware interrupts priorities
Priority level of each interrupt
INT11
Level 0 (initial value)
High
INT9
INT7
INT10
INT8
INT5
INT3
INT1
SCL2, SDA2
SCL1, SDA1
SCL0, SDA0
S/IO4
Key input interrupt 1
INT6
INT4
INT2
INT0
I²C2
I²C1
I²C0
SI/O3
UART1 transmission
PS22
PS20
Priority level of each interrupt
Timer B5
Timer B3
Timer B1
Key input interrupt 0
UART1 reception
PS21
OBE
Timer B4
Timer B2
Timer A4
Timer A2
Timer A0
IBF3
IBF1
A-D conversion
Timer B0
Timer A3
Timer A1
IBF2
IBF0
LRESET
Processor interrupt priority level(IPL)
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
NMI
RESET
Fig.DD-10 Interrupt priority judgement circuit
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
To interrupt request level judgment output
clock generation circuit (Fig. WA-2)
Interrupt request
accepted
Rev.1.00 Jul 16, 2004 page 54 of 266
REJ03B0100-0100Z