M16C6KA_15 Datasheet, PDF (107/270 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6KA Group
Clock asynchronous serial I/O (UART) mode
• Example of receive timing when transfer data are 8 bits long (parity disabled, one stop bit)
BRG1 count
source
“1”
Receive enable bit _{“0”}
RxD1
Start bit
Stop bit
D0
D1 D7
Sampled “L”
Receive data taken in
Transfer clock
Receive
complete flag
RTS1
Receive interrupt
request bit
Reception triggered when transfer clock
“1” is generated by falling edge of start bit
“0”
“H”
“L”
“1”
“0”
Transferred from UART1 receive register to
UART1 receive buffer register
Cleared to “0” when interrupt request is accepted, or cleared by software
The above timing applies to the following settings :
•Parity is disabled.
•One stop bit.
•RTS function is selected.
Fig.GA-15 Typical receive timing in UART mode
Rev.1.00 Jul 16, 2004 page 105 of 266
REJ03B0100-0100Z