M16C6KA_15 Datasheet, PDF (32/270 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6KA Group
Clock Generating Circuit
Clock Control
Fig.WA-2 shows the block diagram of the clock generating circuit.
CM10 “1”
Write signal
RESET
Software reset
NMI
Interrupt request
level judgment
output
WAIT instruction
SQ
R
SQ
R
CM0i : Bit i at address 000616
CM1i : Bit i at address 000716
XIN
XOUT
Main clock
CM02
f1
fAD
f8
f32
bc
a _Divider d
f1SIO2
f8SIO2
f32SIO2
BCLK
b
a
1/2
1/2
1/2
1/2
c
1/2
CM06=1
CM06=0
CM17,CM16=10
CM06=0
CM17,CM16=01
CM06=0
CM17,CM16=00
CM06=0
CM17,CM16=11
d
Details of divider
Fig.WA-2 Clock generating circuit
Rev.1.00 Jul 16, 2004 page 30 of 266
REJ03B0100-0100Z