M16C6KA_15 Datasheet, PDF (34/270 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6KA Group
Clock Generating Circuit
Fig.WA-3 shows the system clock control registers 0 and 1.
System clock control register 0 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
0
001
Symbol
CM0
Address When reset
000616
4816
Bit symbol
Bit name
CM00
Clock output function
select bit
CM01
Function
b1 b0
0 0 : I/O port P57
0 1 : Inhibited
1 0 : f8 output
1 1 : f32 output
RW
CM02
WAIT peripheral function ^{0 :Do not stop peripheral clock in wait mode}
clock stop bit
1 :Stop peripheral clock in wait mode
Reserved bit
Always set to “1”
Reserved bit
Always set to “0”
CM06
Main clock division select 0 : CM16 and CM17 valid
bit 0 (Note 2)
1 : Division by 8 mode
Reserved bit
Always set to “0”
Note 1 : Set bit 0 of the protect register (address 000A16) to "1" before writing to this register.
Note 2 : The bit is set to "1" when shifting from high speed mode or mid speed mode to stop mode and
after reset.
System clock control register 1 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
0000
Symbol
CM1
Address When reset
000716
2016
Bit symbol
Bit name
CM10
All clock stop control bit
(Note 4)
Function
0 : Clock on
1 : All clocks off (stop mode)
Reserved bit
Always set to “0”
Reserved bit
Always set to “0”
Reserved bit
Reserved bit
CM15
XIN-XOUT drive capacity
select bit (Note 2)
CM16
CM17
Main clock division
select bit 1 (Note 3)
Always set to “0”
Always set to “0”
0 : LOW
1 : HIGH
b7 b6
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
RW
Note 1: Set bit 0 of the protect register (address 000A16) to "1" before writing to this register.
Note 2: The bit is set to "1" when shifting from high speed mode or mid speed mode to stop mode and
after reset.
Note 3: Can be selected when bit 6 of the system clock control register 0 (address 000616) is "0".
If "1", division mode is fixed at 8.
Note 4: If this bit is set to "1", XOUT turns "H", and the built-in feedback resistor turns null.
Fig.WA-3 System clock control registers 0 and 1
Rev.1.00 Jul 16, 2004 page 32 of 266
REJ03B0100-0100Z