4559 Datasheet, PDF (9/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4559 Group
PORT BLOCK DIAGRAM
Register Y
Decoder
Skip decision
SZD instruction
(Note 3) FR1i
CLD instruction
SD instruction
RD instruction
S
RQ
(Note 1)
D0−D3 (Note 2)
(Note 1)
Register Y
Decoder
Skip decision
SZD instruction
CLD instruction
SD instruction
RD instruction
FR20
S
RQ
(Note 1)
D4(Note 2)
(Note 1)
Register Y
Decoder
Skip decision
SZD instruction
CLD instruction
SD instruction
RD instruction
FR21
S
RQ
External 0 interrupt
Key-on wakeup input
Timer 1 count start
synchronous circuit input
External 0 interrupt circuit
(Note 4)
(Note 1)
D5/INT(Note 2)
(Note 1)
Notes 1.
This symbol represents a parasitic diode on the port.
2. Applied potential to these ports must be VDD or less.
3. i represents bits 0 to 3.
4. As for details, refer to the external interrupt structure.
Fig 3. Port block diagram (1)
Rev.1.04 Aug 23, 2007 Page 9 of 146
REJ03B0188-0104