|
4559 Datasheet, PDF (131/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER | |||
|
◁ |
4559 Group
Skip condition
Detailed description
â
â Transfers the high-order 4 bits of prescaler to register B.
Transfers the low-order 4 bits of prescaler to register A.
â
â Transfers the contents of register B to the high-order 4 bits of prescaler and prescaler reload register RPS.
Transfers the contents of register A to the low-order 4 bits of prescaler and prescaler reload register RPS.
â
â Transfers the high-order 4 bits (T17âT14) of timer 1 to register B.
Transfers the low-order 4 bits (T13âT10) of timer 1 to register A.
â
â Transfers the contents of register B to the high-order 4 bits of timer 1 and timer 1 reload register R1L.
Transfers the contents of register A to the low-order 4 bits of timer 1 and timer 1 reload register R1L.
â
â Transfers the contents of register B to the high-order 4 bits (R17âR14) of reload register R1, and the contents
of register A to the low-order 4 bits (R13âR10) of reload register R1.
â
â Transfers the high-order 4 bits (T27âT24) of timer 2 to register B.
Transfers the low-order 4 bits (T23âT20) of timer 2 to register A.
â
â Transfers the contents of register B to the high-order 4 bits (R2L7âR2L4) of timer 2 and timer 2 reload register
R2L. Transfers the contents of register A to the low-order 4 bits (R2L3âR2L0) of timer 2 and timer 2 reload
register R2L.
â
â Transfers the contents of register B to the high-order 4 bits (R2H7âR2H4) of timer 2 and timer 2 reload
register R2H. Transfers the contents of register A to the low-order 4 bits (R2H3âR2H0) of timer 2 and timer 2
reload register R2H.
â
â Transfers the contents of timer 2 reload register R2L to timer 2.
â
â Transfers the contents of register A to timer LC and reload register RLC.
V12 = 0 : (T1F) = 1 â When V12 = 0 : Clears (0) to the T1F flag and skips the next instruction when timer 1 interrupt request flag
T1F is â1â. When the T1F flag is â0â, executes the next instruction.
When V12 = 1 : This instruction is equivalent to the NOP instruction.
(V12: bit 2 of interrupt control register V1)
V13 = 0 : (T2F) = 1 â When V13 = 0 : Clears (0) to the T2F flag and skips the next instruction when timer 2 interrupt request flag
T2F is â1â. When the T2F flag is â0â, executes the next instruction.
When V13 = 1 : This instruction is equivalent to the NOP instruction.
(V13: bit 3 of interrupt control register V1)
V20 = 0 : (T3F) = 1 â When V20 = 0 : Clears (0) to the T3F flag and skips the next instruction when timer 3 interrupt request flag
T3F is â1â. When the T3F flag is â0â, executes the next instruction.
When V20 = 1 : This instruction is equivalent to the NOP instruction.
(V20: bit 0 of interrupt control register V2)
Rev.1.04 Aug 23, 2007 Page 131 of 146
REJ03B0188-0104
|
▷ |