4559 Datasheet, PDF(101/148 Page) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

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4559 Datasheet, PDF (101/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

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4559 Group

MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)

SRST (System ReSet)

Instruc-

tion

code

0 0 0 0 0 0 0 0 0 1 2 0 0 1 16

Number of

words

Number of

cycles

Flag CY

Opera- System reset

tion:

Grouping: Other operation

Description: System reset occurs.

Skip condition

SUPT (Set UPT flag)

Instruc-

tion

code

0 0 0 1 0 1 1 0 0 1 2 0 5 9 16

Number of

words

Number of

cycles

Flag CY

Skip condition

Opera- (UPTF) â1

tion:

Grouping: Other operation

Description: Sets (1) to the high-order bit reference enable flag UPTF.

When the table reference instruction (TABP p) is executed,

the high-order 2 bits of ROM reference data is transferred

to the low-order 2 bits of register D.

SVDE (Set Voltage Detector Enable flag)

Instruc-

tion

code

1 0 1 0 0 1 0 0 1 1 2 2 9 3 16

Number of

words

Number of

cycles

Flag CY

Skip condition

Opera- Voltage drop detection circuit valid at powerdown

tion: mode.

Grouping: Other operation

Description: Voltage drop detection circuit is valid at powerdown mode

(clock operating mode, RAM back-up mode)

Note:

This instruction can be used only for H version.

SZB j (Skip if Zero, Bit)

Instruc-

tion

code

0 0 0 0 1 0 0 0 j j 2 0 2 j 16

Number of

words

Number of

cycles

Flag CY

Skip condition

(Mj(DP)) = 0

j = 0 to 3

Opera- (Mj(DP)) = 0 ?

tion: j = 0 to 3

Grouping: Bit operation

Description: Skips the next instruction when the contents of bit j (bit

specified by the value j in the immediate field) of M(DP) is

â0â.

Executes the next instruction when the contents of bit j of

M(DP) is â1â.

Rev.1.04 Aug 23, 2007 Page 101 of 146

REJ03B0188-0104

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