HD404629R Datasheet, PDF (77/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

HD404629R Series
EVND
Edge detection
logic
System
clock
øPER
÷2
÷4
÷8
÷ 32
÷ 128
÷ 512
÷ 2048
3
Timer mode
register D1
(TMD1)
2
Timer D interrupt
request flag
(IFTD)
Timer read
register DL
(TRDL)
Timer read register
DU (TRDU)
4
Timer counter D
(TCDL)
(TCDU)
4
4
Timer write register D
(TWDL)
(TWDU)
Edge detection
control
Data bus
Clock line
Signal line
TOD
Edge detection
selection register
2 (ESR2)
Timer output
control logic
Timer mode
register D2
(TMD2)
3
Figure 61 Block Diagram of Timer D (Free-Running/Reload Timer)
75