HD404629R Datasheet, PDF(14/157 Page) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

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HD404629R Datasheet, PDF (14/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

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HD404629R Series

RAM address

$000

RAM-mapped register area

$000

$003

Interrupt control bits area

$004 Port mode register A (PMRA) W

$040 Memory registers (10 digits)

$005 Serial mode register A (SMRA) W

$050

LCD display area (52 digits)

$006 Serial data register lower (SRL) R/W

$007 Serial data register upper (SRU) R/W

$084

$090

Not used

$008 Timer mode register A (TMA) W

$009 Timer mode register B1 (TMB1) W

$00A Timer B

(TRBL/TWBL) R/W

Data (464 digits Ã 3)*1

V = 0 (bank 0)

V = 1 (bank 1)

$00B

$00C

$00D

(TRBU/TWBU) R/W

Miscellaneous register (MIS) W

Timer mode register C1 (TMC1) W

V = 2 (bank 2)

$00E Timer C

(TRCL/TWCL) R/W

$00F

(TRCU/TWCU) R/W

$010 Timer mode register D1 (TMD1) W

$260

Data (352 digits)

$011

$012

$013

Timer D

(TRDL/TWDL) R/W

(TRDU/TWDU) R/W

Timer mode register B2 (TMB2) R/W

$3C0

Stack (64 digits)

$014

$015

$016

Timer mode register C2 (TMC2) R/W

Timer mode register D2 (TMD2) R/W

A/D mode register

(AMR) W

$3FF

$017 A/D data register lower (ADRL) R

$018 A/D data register upper (ADRU) R

$019 TG mode register

(TGM) W

$01A TG control register

(TGC) W

$01B LCD control register

(LCR) W

$090

$01C LCD mode register

$01D LCD output register 1

(LMR) W

(LOR1) W

Data

(464 digits)

V=0

(bank = 0)

Data

(464 digits)

V=1

(bank = 1)

Data

(464 digits)

V=2

(bank = 2)

$01E LCD output register 2 (LOR2) W

$01F LCD output register 3 (LOR3) W

$020

$023

$024 Port mode register B (PMRB) W

$25F

$025 Port mode register C (PMRC) W

$026 Detection edge select register 1 (ESR1) W

Notes: 1. The data area has three banks:

bank 0 (V = 0) to bank 2 (V = 2).

2. Two registers are mapped

on the same area.

$027 Detection edge select register 2 (ESR2) W

$028 Serial mode register B (SMRB) W

$029 System clock select register (SSR) W

$02A

$02B

Not used

R: Read only

W: Write only

R/W: Read/write

$02C

$02D

$02E

Port D0âD3 DCR

Port D4âD7 DCR

Port D8 and D9 DCR

(DCD0) W

(DCD1) W

(DCD2) W

$02F

Not used

$030 Port R0 DCR

(DCR0) W

$031 Port R1 DCR

(DCR1) W

$032 Port R2 DCR

(DCR2) W

$033 Port R3 DCR

(DCR3) W

$034 Port R4 DCR

(DCR4) W

$035 Port R5 DCR

(DCR5) W

$036 Port R6 DCR

(DCR6) W

$037 Port R7 DCR

(DCR7) W

$038

$03E

Not used

$03F V register

(V) R/W

10 Timer read register B lower (TRBL) R Timer write register B lower (TWBL) W $00A

11 Timer read register B upper (TRBU) R Timer write register B upper (TWBU) W $00B

14 Timer read register C lower (TRCL) R Timer write register C lower (TWCL) W $00E

15 Timer read register C upper (TRCU) R Timer write register C upper (TWCU) W $00F

17 Timer read register D lower (TRDL) R Timer write register D lower (TWDL) W $011

18 Timer read register D upper (TRDU) R Timer write register D upper (TWDU) W $012

Figure 2 RAM Memory Map

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