HD404629R Datasheet, PDF (62/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

HD404629R Series
32.768-kHz
oscillator
1/4
1/2
f _{W Prescaler W}
tw_cyc
(PSW)
2 f_W
1/2 tw_cyc
Selector
Selector
Timer A interrupt
request flag
(IFTA)
Clock Timer
counter A
(TCA) ^Overflow
System
clock
ø _PER
Data bus
Clock line
Signal line
Prescaler S (PSS)
3
Timer mode
register A
(TMA)
Figure 43 Block Diagram of Timer A
Timer A Operations:
• Free-running timer operation: The input clock for timer A is selected by timer mode register A (TMA:
$008).
• Timer A is reset to $00 by MCU reset and
incremented at each input clock. If an input clock is applied to timer A after it has reached
• $FF, an overflow is generated, and timer A is reset to $00. The overflow sets the timer A interrupt
request flag (IFTA: $001, bit 2). Timer A continues to be incremented after reset to $00, and therefore
it generates regular interrupts every 256 clocks.
• Clock time-base operation: Timer A is used as a clock time-base by setting bit 3 (TMA3) of timer
mode register A (TMA: $008) to 1. The prescaler W output is applied to timer A, and timer A
generates interrupts at the correct timing based on the 32.768-kHz crystal oscillation. In this case,
prescaler W and timer A can be reset to $00 by software.
Registers for Timer A Operation: Timer A operating modes are set by the following registers.
• Timer mode register A (TMA: $008): Four-bit write-only register that selects timer A’s operating mode
and input clock source as shown in figure 44.
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