HD404629R Datasheet, PDF (52/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

HD404629R Series
D Port (D₀–D₁₁): Consist of 10 input/output pins and 2 input pins addressed by one bit. D₀–D₉ are high-
current I/O pins, and D₁₀ and D₁₁ are input-only pins.
Pins D₀–D₉ are set by the SED and SEDD instructions, and reset by the RED and REDD instructions.
Output data is stored in the port data register (PDR) for each pin. All pins D₀–D₁₁ are tested by the TD and
TDD instructions.
The on/off statuses of the output buffers are controlled by D-port data control registers (DCD0–DCD2:
$02C–$02E) that are mapped to memory addresses (figure 30).
Pins D₁₀ and D₁₁ are multiplexed with peripheral function pins STOPC and INT₀, respectively. The
peripheral function modes of these pins are selected by bits 2 and 3 (PMRC2, PMRC3) of port mode
register C (PMRC: $025) (figure 31).
R Ports (R0₀–R7₃): 32 input/output pins addressed in 4-bit units. Data is input to these ports by the LAR
and LBR instructions, and output from them by the LRA and LRB instructions. Output data is stored in the
port data register (PDR) for each pin. The on/off statuses of the output buffers of the R ports are controlled
by R-port data control registers (DCR0–DCR7: $030–$037) that are mapped to memory addresses (figure
30).
Pins R0₀–R0₃ are multiplexed with peripheral pins INT₁–INT₄, respectively. The peripheral function
modes of these pins are selected by bits 0–3 (PMRB0–PMRB3) of port mode register B (PMRB: $024)
(figure 32).
Pins R1₀–R1₂ are multiplexed with peripheral pins TOB, TOC, and TOD, respectively. The peripheral
function modes of these pins are selected by bits 0 and 1 (TMB20, TMB21) of timer mode register B2
(TMB2: $013), bits 0–2 (TMC20–TMC22) of timer mode register C2 (TMC2: $014), and bits 0–3
(TMD20–TMD23) of timer mode register D2 (TMD2: $015) (figures 33, 34, and 35).
Pins R1₃ and R2₀ are multiplexed with peripheral pins EVNB and EVND, respectively. The peripheral
function modes of these pins are selected by bits 0 and 1 (PMRC0, PMRC1) of port mode register C
(PMRC: $025) (figure 31).
Pins R2₁–R2₃ are multiplexed with peripheral pins SCK, SI, and SO, respectively. The peripheral function
modes of these pins are selected by bit 3 (SMRA3) of serial mode register A (SMRA: $005), and bits 0 and
1 (PMRA0, PMRA1) of port mode register A (PMRA: $004), as shown in figures 36 and 37.
Ports R3 and R4 are multiplexed with segment pins SEG1–SEG8, respectively. The function modes of
these pins can be selected by individual pins, by setting LCD output registers 1 and 2 (LOR1, LOR2: $01D,
$01F) (figures 38 and 39).
Ports R5–R7 are multiplexed with segment pins SEG9–SEG20, respectively. The function modes of these
pins can be selected in 4-pin units by setting LCD output register 3 (LOR3: $01F) (figure 40).
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