HD404629R Datasheet, PDF (29/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

Detection edge selection register 2 (ESR2: $027)
Bit
Initial value
Read/Write
Bit name
3
0
W
ESR23
2
0
W
ESR22
1
0
W
ESR21
0
0
W
ESR20
HD404629R Series
ESR23 ESR22
0
0
1
1
0
1
EVND detection edge
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection^*
ESR21 ESR20
0
0
1
1
0
1
INT₄ detection edge
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection^*
Note: * Both falling and rising edges are detected.
Figure 13 Detection Edge Selection Register 2 (ESR2)
External Interrupt Masks (IM0–IM4: $000, $001, $022, $023): Prevent (mask) interrupt requests
caused by the corresponding external interrupt request flags, as listed in table 6.
Table 6 External Interrupt Masks (IM0–IM4: $000, $001, $022, $023)
IM0–IM4
0
1
Interrupt Request
Enabled
Disabled (masked)
Timer A Interrupt Request Flag (IFTA: $001, Bit 2): Set by overflow output from timer A, as listed in
table 7.
Table 7 Timer A Interrupt Request Flag (IFTA: $001, Bit 2)
IFTA
0
1
Interrupt Request
No
Yes
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