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HD404629R Datasheet, PDF (150/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit
HD404629R Series
AC Characteristics (HD404628R, HD4046212R, HD404629R: VCC = 2.7 to 6.0 V, GND = 0 V, Ta =
–20°C to +75°C; HD4074629: VCC = 2.7 to 5.5 V, GND = 0 V, Ta = –20°C to +75°C, unless otherwise
specified) (cont)
Item
Symbol
Pin(s)
Min Typ Max Unit
Test Condition Notes
External clock
tCPf
OSC1
—
—
150 ns
fOSC = 400 kHz 4
fall time
—
—
75
ns
fOSC = 800 kHz 4
—
—
35
ns
fOSC = 2 MHz
4
—
—
20
ns
fOSC = 4 MHz
4
INT0–INT4, EVNB ,
tI H
INT0–INT4,
2
—
—
tcyc /
—
5
EVND high widths
EVNB, EVND
tsubcyc
INT0–INT4, EVNB ,
tI L
INT0–INT4,
2
—
—
tcyc /
—
5
EVND low widths
EVNB, EVND
tsubcyc
RESET high width
tRSTH
RESET
2
—
—
tcyc
—
6
STOPC low width
tSTPL
STOPC
1
—
—
tRC
—
7
RESET fall time
tRSTf
RESET
—
—
20
ms
—
6
STOPC rise time
tSTPr
STOPC
—
—
20
ms
—
7
Input capacitance
Cin
All pins
except D11
—
—
15
pF
f = 1 MHz
Vin = 0 V,
D11
—
—
15
pF
HD404628R,
HD4046212R,
HD404629R:
f = 1 MHz,
Vin = 0 V
—
—
180 pF
HD4074629:
f = 1 MHz,
Vin = 0 V
Notes: 1. Be sure to set system clock selection register (SSR) bits SSR1 and SSR0 to match the system
clock oscillator frequency.
2. Applies to voltage ranges VCC = 3.5 to 5.5 V for the HD4074629.
3. There are three oscillator stabilization times.
(1) At power on, the time between the point where VCC reaches 2.7 V and the point where
oscillation has stabilized.
(2) At clearing stop mode, the time between the point where the RESET pin reaches the high
level and the point where oscillation has stabilized.
(3) At clearing stop mode, the time between the point where the STOPC pin reaches the low level
and the point where oscillation has stabilized.
At power on or when stop mode is cleared, RESET or STOPC must be input for at least tRC to
ensure the oscillation stabilization time.
Since the oscillator stabilization time will depend on circuit constants and stray capacitances,
determine the oscillator by consulting with the oscillator’s manufacturer.
Be sure to set miscellaneous register (MIS) bits MIS1 and MIS0 to match the system clock
oscillator stabilization time.
4. Refer to figure 108.
5. Refer to figure 109. The tcyc unit applies when the MCU is in standby or active mode.
The tsubcyc unit applies when the MCU is in watch or subactive mode.
6. Refer to figure 110.
7. Refer to figure 111.
148