HD404629R Datasheet, PDF (100/157 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a DTMF Generator Circuit

HD404629R Series
Note on Use: Use the SEM and SEMD instructions to write data to the A/D start flag (ADSF: $020, bit 2),
but make sure that the A/D start flag is not written to during A/D conversion. Data read from the A/D data
register (ADRL: $017, ADRU: $018) during A/D conversion cannot be guaranteed.
The A/D converter does not operate in the stop, watch, and subactive modes because of the OSC clock.
During these low-power dissipation modes, current through the resistor ladder is cut off to decrease the
power input.
DTMF Generation Circuit
The MCU provides a dual-tone multifrequency (DTMF) generation circuit. The DTMF signal consists of
two sine waves to access the switching system.
Figure 87 shows the DTMF keypad and frequencies. Each key enables tones to be generated corresponding
to each frequency. Figure 88 shows a block diagram of the DTMF circuit.
The OSC clock (400 kHz, 800 kHz, 2 MHz, or 4 MHz) is changed into four clock signals through the
division circuit (1/2, 1/5, and 1/10). The DTMF circuit uses one of the four clock signals, which is
selected by the system clock select register (SSR: $029) depending on the OSC clock frequency. The
DTMF circuit has transformed programmable dividers, sine wave counters, and control registers.
The DTMF generation circuit is controlled by the following three registers.
1
2
3
A
R1 (697 Hz)
4
5
6
B
R2 (770 Hz)
7
8
9
C
R3 (852 Hz)
*
0
#
D
R4 (941 Hz)
Figure 87 DTMF Keypad and Frequencies
98