455A Datasheet, PDF (74/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

455A Group
(2) Connection of bypass capacitor across VSS line
and VDD line
Connect an approximately 0.1 µF bypass capacitor across the
VSS line and the VDD line as follows:
• Connect a bypass capacitor across the VSS pin and the VDD pin
at equal length.
• Connect a bypass capacitor across the VSS pin and the VDD pin
with the shortest possible wiring.
• Use lines with a larger diameter than other signal lines for VSS
line and VDD line.
• Connect the power source wiring via a bypass capacitor to the
VSS pin and the VDD pin.
(3) Oscillator concerns
Take care to prevent an oscillator that generates clocks for a
microcomputer operation from being affected by other signals.
(1) Keeping oscillator away from large current signal lines
Install a microcomputer (and especially an oscillator) as far
as possible from signal lines where a current larger than the
tolerance of current value flows.
• Reason
In the system using a microcomputer, there are signal lines for
controlling motors, LEDs, and thermal heads or others. When
a large current flows through those signal lines, strong noise
occurs because of mutual inductance.
VDD
VDD
VSS
N.G.
VSS
O.K.
Fig 75. Bypass capacitor across the VSS line and the
VDD line
Mutual inductance
M
Microcomputer
Large
current
XIN
XOUT
VSS
GND
Fig 76. Wiring for a large current signal line
(2) Installing oscillator away from signal lines where potential
levels change frequently
Install an oscillator and a connecting pattern of an oscillator
away from signal lines where potential levels change
frequently. Also, do not cross such signal lines over the
clock lines or the signal lines which are sensitive to noise.
• Reason
Signal lines where potential levels change frequently (such as
the CNTR pin signal line) may affect other lines at signal
rising edge or falling edge. If such lines cross over a clock line,
clock waveforms may be deformed, which causes a
microcomputer failure or a program runaway.
Rev.1.01 Feb 15, 2008 Page 74 of 146
REJ03B0224-0101
Do not cross
CNTR
XIN
XOUT
VSS
N.G.
Fig 77. Wiring to a signal line where potential levels
change frequently