455A Datasheet, PDF (54/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

455A Group
VOLTAGE DROP DETECTION CIRCUIT (WITH SKIP
JUDGMENT)
The built-in voltage drop detection circuit is used to set the
voltage drop detection circuit flag (VDF) or to perform system
reset.
EPOF instruction + POF instruction
EPOF instruction + POF2 instruction
Internal reset signal
T3UDF
Key-on wakeup signal
SQ
RQ
Oscillation stop signal
SVDE instruction S Q
Internal reset signal R
VDCE
(Note 2)
(Note 1)
(Note 1)
VDD
VRST^−/VRST⁺
Voltage drop detection
circuit reset signal
Reset occurrence
VDD
VSKIP
Voltage drop detection
circuit flag
VDF
Skip judgement
Flag occurrence
Voltage drop
detection circuit
Notes 1:
This symbol represents a parasitic diode.
2: Applied potential to RESET pin must be VDD or less.
Fig 53. Voltage drop detection reset circuit
(1) Operating state of voltage drop detection circuit
The voltage drop detection circuit becomes valid by inputting
“H” to the VDCE pin and it becomes invalid by inputting “L.”
When not executing the SVDE instruction under “H” level of the
VDCE pin, the voltage drop detection circuit become invalid in
power down state (RAM back-up, clock operating mode). As for
this, the voltage drop detection circuit becomes valid at returning
from power down, again.
When executing the SVDE instruction under “H” level of the
VDCE pin, the voltage drop detection circuit becomes valid in
power down state (RAM back-up, clock operating mode).
The state of executing SVDE instruction can be cleared by
system reset.
Table 22 Operating state of voltage drop detection circuit
VDCE pin SVDE instruction
at CPU operating
No execute
×
“L”
Execute
×
No execute
O
“H”
Execute
O
Note. “O” indicates valid, “×” indicates invalid.
at power down
×
×
×
O
Rev.1.01 Feb 15, 2008 Page 54 of 146
REJ03B0224-0101