455A Datasheet, PDF (62/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

455A Group
CLOCK CONTROL
The clock control circuit consists of the following circuits.
• High-speed on-chip oscillator
• Ceramic resonator
• Low-speed on-chip oscillator
• Quartz-crystal oscillation circuit
• Frequency divider
• Internal clock generating circuit
The system clock and the instruction clock are generated as the
source clock for operation by these circuits.
Figure 59 shows the structure of the clock control circuit.
The 455A Group operates by the high-speed on-chip oscillator
clock (f(HSOCO)) which is the internal oscillator after system is
released from reset.
The quartz-crystal oscillator can be used for sub-clock (f(XCIN)).
High-speed on-chip oscillator
(internal oscillator)
XIN
XOUT
Ceramic
resonance
XCIN
XCOUT
Quartz-crystal
oscillation
MR1, MR0
10
11
Division circuit
Divided by 8
Divided by 4
Divided by 2
MR3, MR2
11
10
01
00
System clock (STCK)
Internal clock
generating circuit
(divided by 3)
Instruction clock
(INSTCK)
RG0
RG1
Internal reset signal
T3F signal
QS
R
QS
R
Key-on wakeup signal
EPOF instruction + POF instruction
EPOF instruction + POF2 instruction
RG
Low-speed on-chip oscillator
(Low-speed internal oscillator)
RG3
Fig 59. Clock control circuit structure
Rev.1.01 Feb 15, 2008 Page 62 of 146
REJ03B0224-0101