455A Datasheet, PDF (137/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

455A Group
Skip condition
Detailed description
−
−
−
−
(P) = 1
(WDF1) = 1
−
−
−
−
− No operation; Adds 1 to program counter value, and others remain unchanged.
− Puts the system in clock operating mode by executing the POF instruction after executing the EPOF
instruction.
− Puts the system in RAM back-up state by executing the POF2 instruction after executing the EPOF
instruction.
− Makes the immediate after POF or POF2 instruction valid by executing the EPOF instruction.
− Skips the next instruction when the P flag is “1”.
After skipping, the P flag remains unchanged.
Executes the next instruction when the P flag is “0”.
Clears (0) to the WDF1 flag and skips the next instruction when watchdog timer flag WDF1 is “1”. When the
WDF1 flag is “0”, executes the next instruction. Also, stops the watchdog timer function when executing the
WRST instruction immediately after the DWDT instruction.
− Stops the watchdog timer function by the WRST instruction after executing the DWDT instruction.
− System reset occurs.
− Clears (0) to the high-order bit reference enable flag UPTF.
− Sets (1) to the high-order bit reference enable flag UPTF.
(VDF) = 1
−
− Skips the next instruction when voltage drop detection circuit flag VDF is “1”. Execute instruction when VPF
is “0”.
After skipping, the contents of VDF remains unchanged.
− Validates the voltage drop detection circuit at power down (clock operating mode and RAM back-up mode).
Sets referring data area to pages 0 to 63 when the TABP p instruction is executed.
This instruction is valid only for the TABP p instruction.
Sets referring data area to pages 64 to 127 when the TABP p instruction is executed.
This instruction is valid only for the TABP p instruction.
Rev.1.01 Feb 15, 2008 Page 137 of 146
REJ03B0224-0101