455A Datasheet, PDF (55/148 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

455A Group
(2) Voltage drop detection circuit flag (VDF)
Voltage drop detection circuit flag (VDF) is set to “1” when the
supply voltage goes the skip occurrence voltage (VSKIP) or less.
Moreover, voltage drop detection circuit flag (VDF) is cleared to
“0” when the supply voltage goes the skip occurrence voltage
(VSKIP) or more. The state of the voltage drop detection circuit
flag (VDF) can be examined with the skip instruction (SNZVD).
Even when the skip instruction is executed, the voltage drop
detection circuit flag is not cleared to “0”.
Refer to the electrical characteristics for skip occurrence voltage
value.
(3) Voltage drop detection circuit reset
System reset is performed when the supply voltage goes the reset
occurrence voltage (VRST^-) or less.
When the supply voltage goes reset release voltage (VRST⁺) or
more, the oscillation circuit goes to be in the operating enabled
state and system reset is released .
Refer to the electrical characteristics for reset occurrence value
and reset release voltage value.
VDD
VSKIP (skip occurrence voltage)
VRST+(reset release voltage)
VRST^-(reset occurrence voltage)
Voltage drop detection circuit
flag (VDF)
Voltage drop
detection circuit
reset signal
(Note 1)
Note 1: Microcomputer starts operation after high-speed on-chip oscillator clock is counted 1376 times.
Fig 54. Voltage drop detection circuit operation waveform
VDD
Recommended operating condition
min.value
VRST+
VRST^-
VDD
Recommended operating condition
min.value
VRST+
VRST^-
Fig 55. VDD and VRST^-
No reset
Program failure may occur.
Normal operation
Reset
(4) Note on voltage drop detection circuit
The voltage drop detection circuit detection voltage of this
product is set up lower than the minimum value of the supply
voltage of the recommended operating conditions.
When the supply voltage of a microcomputer falls below to the
minimum value of recommended operating conditions and
regoes up, depending on the capacity value of the bypass
capacitor added to the power supply pin, the following case may
cause program failure (Figure 55);
supply voltage does not fall below to VRST^-, and its voltage re-
goes up with no reset.
In such a case, please design a system which supply voltage is
once reduced below to VRST^- and re-goes up after that.
Rev.1.01 Feb 15, 2008 Page 55 of 146
REJ03B0224-0101