M32C82_15 Datasheet, PDF (73/84 Pages) Renesas Technology Corp – SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER

M32C/82 Group
5. Electrical Characteristics (VCC = 3.3V)
Vcc=3.3V
Memory expansion mode and microprocessor mode (with no wait state)
Read timing
BCLK
td(BCLK-ALE)
18ns.max
th(BCLK-ALE)
-2ns.min
ALE
td(BCLK-CS)
18ns.max⁽¹⁾
th(BCLK-CS)
0ns.min
CSi
tcyc
th(RD-CS)
0ns.min
td(BCLK-AD)
18ns.max⁽¹⁾
ADi
th(BCLK-AD)
0ns.min
BHE
td(BCLK-RD)
18ns.max
th(RD-AD)
0ns.min
RD
tac2(RD-DB)⁽²⁾
tac2(AD-DB)⁽²⁾
th(BCLK-RD)
-3ns.min
Hi-Z
DB
tsu(DB-BCLK)
th(RD-DB)
30ns.min⁽¹⁾
0ns.min
NOTES:
1. A value is guarantee with no external factor. Maximum 35ns is garanteed for td(BCLK-AD)+tsu(DB-BCLK).
2. It varies with the operation frequency.
tac2(RD-DB)=(tcyc/2-35)ns.max
tac2(AD-DB)=(tcyc-35)ns.max
Write timing
BCLK
ALE
CSi
ADi
BHE
WR,WRL,
WRH
td(BCLK-ALE)
18ns.max
th(BCLK-ALE)
-2ns.min
td(BCLK-CS)
18ns.max
tcyc
td(BCLK-AD)
18ns.max
td(BCLK-WR) _tw(WR)(1)
18ns.max
td(DB-WR)⁽¹⁾
th(BCLK-CS)
0ns.min
th(WR-CS)⁽¹⁾
th(BCLK-AD)
0ns.min
th(WR-AD)⁽¹⁾
th(BCLK-WR)
0ns.min
th(WR-DB)⁽¹⁾
DBi
NOTES:
1. It varies with the operation frequency.
td(DB-WR)=(tcyc-20)ns.min
th(WR-DB)=(tcyc/2-10)ns.min
th(WR-AD)=(tcyc/2-10)ns.min
th(WR-CS)=(tcyc/2-10)ns.min
tw(WR)=(tcyc/2-15)ns.min
Figure 5.10 VCC=3.3V Timing Diagram (1)
Measurement conditions
• VCC=3.0 to 3.6V
• Input high and low voltage: VIH=1.5V, VIL=0.5V
• Output high and low voltage: VOH=1.5V, VOL=1.5V
Rev.1.20 Jun. 01, 2004 page 71 of 80