M32C82_15 Datasheet, PDF (71/84 Pages) Renesas Technology Corp – SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER

M32C/82 Group
5. Electrical Characteristics (VCC = 3.3 V)
Switching Characteristics
(VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85^oC unless otherwise specified)
VCC = 3.3V
Table 5.41 Memory Expansion Mode and Microprocessor Mode
(With a Wait State, Accessing an External Memory and Selecting a Space with the
Multiplexed Bus)
Symbol
Parameter
Measurement
condition
Standard
Unit
Min
Max
td(BCLK-AD) Address output delay time
18
ns
th(BCLK-AD) Address output hold time (BCLK standard)
0
ns
th(RD-AD) Address output hold time (RD standard)
(Note 1)
ns
th(WR-AD) Address output hold time (WR standard)
(Note 1)
ns
td(BCLK-CS) Chip-select signal output delay time
18
ns
th(BCLK-CS) Chip-select signal output hold time (BCLK standard)
0
ns
th(RD-CS) Chip-select signal output hold time (RD standard)
(Note 1)
ns
th(WR-CS) Chip-select signal output hold time (WR standard)
(Note 1)
ns
td(BCLK-RD) RD signal output delay time
th(BCLK-AD) RD signal output hold time
See Figure 5.1
-3
18
ns
ns
td(BCLK-WR) WR signal output delay time
18
ns
td(BCLK-WR) WR signal output hold time
0
ns
td(DB-WR) Data output delay time (WR standard)
(Note 1)
ns
th(WR-DB) Data output hold time (WR standard)
(Note 1)
ns
td(BCLK-ALE) ALE signal output delay time (BCLK standard)
18
ns
th(BCLK-ALE) ALE signal output hold time (BCLK standard)
-2
ns
td(AD-ALE) ALE signal output delay time (address standard)
(Note 1)
ns
th(ALE-AD) ALE signal output hold time (address standard)
(Note 1)
ns
tdz(RD-AD) Address output high-impedance time
8
ns
NOTES:
1. A value can be obtained from the following expressions according to the BCLK frequency.
th(RD – AD) =
10 ⁹
– 10 [ns]
f(BCLK) X 2
10 ⁹
th(WR – AD) =
– 10 [ns]
f(BCLK) X 2
10 ⁹
th(RD – CS) =
–10 [ns]
f(BCLK) X 2
10 ⁹
th(WR – CS) =
– 10 [ns]
f(BCLK) X 2
10⁹X m
td(DB – WR) = _{f(BCLK) X 2} – 25 [ns] (m=3 with 2 wait states and m=5 with 3 wait states)
10 ⁹
th(WR – DB) =
– 10
f(BCLK) X 2
[ns]
10 ⁹
td(AD – ALE) =
– 20 [ns]
f(BCLK) X 2
10 ⁹
th(ALE – AD) = _{f(BCLK) X 2} – 10 [ns]
Rev.1.20 Jun. 01, 2004 page 69 of 80