M32C82_15 Datasheet, PDF (56/84 Pages) Renesas Technology Corp – SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER

M32C/82 Group
5. Electrical Characteristics (VCC = 5V)
Vcc=5V
Memory expansion mode and microprocessor mode (with no wait state)
Read timing
BCLK
ALE
td(BCLK-ALE) _th(BCLK-ALE)
18ns.max
-2ns.min
td(BCLK-CS)
18ns.max⁽¹⁾
th(BCLK-CS)
-3ns.min
CSi
tcyc
th(RD-CS)
0ns.min
td(BCLK-AD)
18ns.max⁽¹⁾
ADi
th(BCLK-AD)
-3ns.min
BHE
td(BCLK-RD)
18ns.max
th(RD-AD)
0ns.min
RD
tac1(RD-DB)⁽²⁾
tac1(AD-DB)⁽²⁾
th(BCLK-RD)
-5ns.min
Hi-Z
DB
NOTES:
tsu(DB-BCLK)
26ns.min⁽¹⁾
th(RD-DB)
0ns.min
1. A value is guaranteed with no external factor. Maximum 35ns is guaranteed for td(BCLK-AD)+tsu(DB-BCLK).
2. It varies with the operation frequency.
tac1(RD-DB)=(tcyc/2-35)ns.max
tac1(AD-DB)=(tcyc-35)ns.max
Write timing ( written in 2 cycles with no wait state)
BCLK
ALE
CSi
ADi
BHE
WR,WRL,
WRH
18ns.max
td(BCLK-ALE)
th(BCLK-ALE)
-2ns.min
td(BCLK-CS)
18ns.max
th(BCLK-CS)
-3ns.min
tcyc
td(BCLK-AD)
18ns.max
th(WR-CS)⁽¹⁾
th(BCLK-AD)
-3ns.min
td(BCLK-WR) _tw(WR)(1)
18ns.max
th(WR-AD)⁽¹⁾
td(DB-WR)⁽¹⁾
th(BCLK-WR)
-3ns.min
th(WR-DB)⁽¹⁾
DBi
NOTES:
1. It varies with the operation frequency.
td(DB-WR)=(tcyc-20)ns.min
th(WR-DB)=(tcyc/2-10)ns.min
th(WR-AD)=(tcyc/2-10)ns.min
th(WR-CS)=(tcyc/2-10)ns.min
tw(WR)=(tcyc/2-15)ns.min
Measurement conditions
• VCC=4.2 to 5.5V
• Input high and low voltage: VIH=2.5V, VIL=0.8V
• Output high and low voltage: VOH=2.0V, VOL=0.8V
Figure 5.2 VCC=5V Timing Diagram (1)
Rev.1.20 Jun. 01, 2004 page 54 of 80