M32C82_15 Datasheet, PDF (59/84 Pages) Renesas Technology Corp – SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER

M32C/82 Group
5. Electrical Characteristics (VCC = 5V)
Memory expansion mode and microprocessor mode
(When accessing the DRAM area)
Read timing
BCLK
tcyc
td(BCLK-RAD) th(BCLK-RAD)
18ns.max _-3ns.min
MAi
Row address
td(BCLK-CAD)
18ns.max⁽¹⁾
Column address
th(RAS-RAD)⁽²⁾
th(BCLK-CAD)
-3ns.min
tRP⁽²⁾
RAS
CASL
CASH
td(BCLK-RAS)
18ns.max⁽¹⁾
td(BCLK-CAS)
18ns.max⁽¹⁾
th(BCLK-RAS)
-3ns.min
th(BCLK-CAS)
-3ns.min
Vcc=5V
DW
tac4(CAS-DB)⁽²⁾
tac4(CAD-DB)⁽²⁾
tac4(RAS-DB)⁽²⁾
DB
Hi-Z
tsu(DB-BCLK)
26ns.min⁽¹⁾
th(CAS-DB)
0ns.min
NOTES:
1. A value is guaranteed with no external factor. Maximum 35ns is guaranteed for td(BCLK-AD)+tsu(DB-BCLK).
td(BCLK-RAS) + tsu(DB-BCLK)
td(BCLK-CAS) + tsu(DB-BCLK)
td(BCLK-CAD) + tsu(DB-BCLK)
2. It varies with the operation frequency.
tac4(RAS-DB)=(tcyc/2 x m-35)ns.max (m=3 with 1 wait state and m=5 with 2 wait states)
tac4(CAS-DB)=(tcyc/2 x n-35)ns.max (n=1 with 1 wait state and n=3 with 2 wait states)
tac4(CAD-DB)=(tcyc x l-35)ns.max (l=1 with 1 wait state and l=2 with 2 wait states)
th(RAS-RAD)=(tcyc/2-13)ns.min
tRP=(tcyc/2 x 3-20)ns.min
Measurement conditions
• VCC=4.2 to 5.5V
• Input high and low voltage: VIH=2.5V, VIL=0.8V
• Output high and low voltage: VOH=2.0V, VOL=0.8V
Figure 5.5 VCC=5V Timing Diagram (4)
Rev.1.20 Jun. 01, 2004 page 57 of 80