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M3727GM6 Datasheet, PDF (67/129 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER | |||
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M3727GM6/M8âXXXSP/FP M37272E8SP/FP
The horizontal display start position is common to all blocks, and can
be set in 128 steps (where 1 step is 4TOSC, TOSC being the OSD
oscillation cycle) as values â0016â to âFF16â in bits 0 to 6 of the hori-
zontal position register (address 00D116). The horizontal position reg-
ister is shown in Figure 8.11.8.
Horizontal Position Register
b7 b6 b5 b4 b3 b2 b1 b0
Horizontal position register (HP) [Address 00D1 16]
B
Name
Functions
0 Horizontal display start Horizontal display start positions
to position control bits
128 steps (0016 to 7F16)
6 (HP0 to HP6)
(1 step is 4TOSC)
7 Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is â0.â
After reset R W
0 RW
0 Râ
Note: The setting value synchronizes with the V SYNC.
Fig. 8.11.8 Horizontal Position Register
Notes 1 : 1TC (TC : OSD clock cycle divided in pre-divide circuit) gap occurs
between the horizontal display start position set by the horizontal
position register and the most left dot of the 1st block. Accordingly,
when 2 blocks have different pre-divide ratios, their horizontal dis-
play start position will not match.
2 : The horizontal start position is based on the OSD clock source cycle
selected for each block. Accordingly, when 2 blocks have different
OSD clock source cycles, their horizontal display start position will
not match.
3 : When setting â0016â to the horizontal position register, it needs ap-
proximately 62TOSC (= Tdef) interval from a rising edge (when nega-
tive polarity is selected) of HSYNC signal to the horizontal display start
position.
HSYNC
Note 1 Tdef
4TOSC â N
1TC
Block 2 (Pre-divide ratio = 2, clock source = data slicer clock)
1TC
Block 3 (Pre-divide ratio = 3, clock source = data slicer clock)
Tdefâ 4TOSCâ â N
Note 2
1TC
Block 4 (Pre-divide ratio = 3, clock source = OSC1)
N : Value of horizontal position register (decimal notation)
1TC : OSD clock cycle divided in pre-divide circuit
TOSC : OSD oscillation cycle
Tdef : 62 TOSC
Fig. 8.11.9 Notes on Horizontal Display Start Position
Rev.1.00 Apr 01, 2001 page 67 of 127
REJ03B0132-0100Z
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