English
Language : 

M3727GM6 Datasheet, PDF (41/129 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
M3727GM6/M8–XXXSP/FP M37272E8SP/FP
8.7 PWM OUTPUT FUNCTION
This microcomputer is equipped with six 8-bit PWMs (PWM0–
PWM5). PWM0–PWM5 have the same circuit structure and an 8-bit
resolution with minimum resolution bit width of 4 µs (for f(XIN) = 8
MHz) and repeat period of 1024 µs (for f(XIN) = 8 MHz).
Figure 8.7.1 shows the PWM block diagram. The PWM timing gen-
erating circuit applies individual control signals to PWM0–PWM5 us-
ing f(XIN) divided by 2 as a reference signal.
8.7.1 Data Setting
When outputting PWM0–PWM5, set 8-bit output data to the PWMi
register (i means 0 to 5; addresses 020016 to 020516).
8.7.2 Transmitting Data from Register to PWM
circuit
Data transfer from the 8-bit PWM register to the 8-bit PWM circuit is
executed at writing data to the register.
The signal output from the 8-bit PWM output pin corresponds to the
contents of this register.
8.7.3 Operating of 8-bit PWM
The following explains PWM operation.
First, set the bit 0 of PWM mode register 1 (address 020816) to “0”
(at reset, bit 0 is already set to “0” automatically), so that the PWM
count source is supplied.
PWM0–PWM5 are also used as pins P00–P05. Set the correspond-
ing bits of the port P0 direction register to “1” (output mode). And
select each output polarity by bit 3 of PWM mode register 1 (address
020816). Then, set bits 5 to 0 of PWM mode register 2 (address
020916) to “1” (PWM output).
The PWM waveform is output from the PWM output pins by setting
these registers.
Figure 17 shows the 8-bit PWM timing. One cycle (T) is composed
of 256 (28) segments. The 8 kinds of pulses relative to the weight of
each bit (bits 0 to 7), are output inside the circuit during 1 cycle.
Refer to Figure 17 (a). The 8-bit PWM outputs waveform which is
the logical sum (OR) of pulses corresponding to the contents of bits
0 to 7 of the 8-bit PWM register. Several examples are shown in
Figure 17 (b). 256 kinds of output (HIGH area: 0/256 to 255/256) are
selected by changing the contents of the PWM register. A length of
entirely HIGH cannot be output, i.e. 256/256.
8.7.4 Output after Reset
At reset, the output of ports P00–P05 is in the high-impedance state,
and the contents of the PWM register and the PWM circuit are unde-
fined. Note that after reset, the PWM output is undefined until setting
the PWM register.
Rev.1.00 Apr 01, 2001 page 41 of 127
REJ03B0132-0100Z