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M3727GM6 Datasheet, PDF (40/129 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER | |||
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M3727GM6/M8âXXXSP/FP M37272E8SP/FP
(3) RESTART condition generating procedure
âProcedure example (The necessary conditions of the generating
procedure are described as the following â to â
.)
Execute the following procedure when the PIN bit is â0.â
LDM
LDA
SEI
STA
LDM
CLI
â¢
â¢
#$00, S1
â
S0
#$F0, S1
â¢
â¢
(Select slave receive mode)
(Taking out of slave address value)
(Interrupt disabled)
(Writing of slave address value)
(Trigger of RESTART condition generating)
(Interrupt enabled)
âSelect the slave receive mode when the PIN bit is â0.â Do not write
â1â to the PIN bit. Neither â0â nor â1â is specified for the writing to
the BB bit.
The TRX bit becomes â0â and the SDA pin is released.
âThe SCL pin is released by writing the slave address value to the
I2C data shift register. Use âSTA,â âSTXâ or âSTYâ of the zero page
addressing instruction for writing.
âUse âLDMâ instruction for setting trigger of RESTART condition gen-
erating.
âWrite the slave address value of above â and set trigger of RE-
START condition generating of above â continuously shown the
above procedure example.
â
Disable interrupts during the following two process steps:
⢠Writing of slave address value
⢠Trigger of RESTART condition generating
(4) STOP condition generating procedure
âProcedure example (The necessary conditions of the generating
procedure are described as the following â to â.)
â¢
â¢
SEI
LDM #$C0, S1
NOP
LDM #$D0, S1
CLI
â¢
â¢
(Interrupt disabled)
(Select master transmit mode)
(Set NOP)
(Trigger of STOP condition generating)
(Interrupt enabled)
âWrite â0â to the PIN bit when master transmit mode is select.
âExecute âNOPâ instruction after setting of master transmit mode.
Also, set trigger of STOP condition generating within 10 cycles af-
ter selecting of master trasmit mode.
âDisable interrupts during the following two process steps:
⢠Select of master transmit mode
⢠Trigger of STOP condition generating
(5) Writing to I2C status register
Do not execute an instruction to set the PIN bit to â1â from â0â and an
instruction to set the MST and TRX bits to â0â from â1â simultaneously.
It is because it may enter the state that the SCL pin is released and
the SDA pin is released after about one machine cycle. Do not ex-
ecute an instruction to set the MST and TRX bits to â0â from â1â si-
multaneously when the PIN bit is â1.â It is because it may become the
same as above.
(6) Process of after STOP condition generating
Do not write data in the I2C data shift register S0 and the I2C status
register S1 until the bus busy flag BB becomes â0â after generating
the STOP condition in the master mode. It is because the STOP
condition waveform might not be normally generated. Reading to the
above registers do not have the problem.
Rev.1.00 Apr 01, 2001 page 40 of 127
REJ03B0132-0100Z
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